Projects and Artifacts

Current Projects:

  • ILLIXR (ILLInois eXtended Reality) testbed: here
  • ArchGen: A Graph-to-Silicon Hardware Generation Framework for Design Space Exploration. Open source!
  • Chrysalis-HLS: An Iteratively-refined Dataset for High-Level Synthesis Functional Verification through LLM-Aided Bug Injection. Open source!
  • SnapKV: LLM Knows What You are Looking for Before Generation. Open source!
  • Medusa: Simple LLM Inference Acceleration Framework with Multiple Decoding Heads. Open source!
  • OS4C: An Open-Source SR-IOV System for SmartNIC-based Cloud Platforms. Open source!
  • TiNA: Tiered network buffer architecture for fast networking in chiplet-based CPUs. Open source!
  • NetZIP: algorithm/hardware co-design of in-network lossless compression for distributed large model. Open source!
  • HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis. Open source!
  • ScaleHLS: A Scalable High-Level Synthesis Framework on top of MLIR. Open source!
  • PyLog: A Python to FPGA Compiler. Open source!
  • FSSD: FPGA-based SSD Emulator for SSDs
  • NimBlock: Scheduling for Virtualized FPGA and Versal Devices. Open source!
  • Qilin: FPGA-based Shared Virtual Memory System
  • Morpheus: A Polymorphous Design for General-purpose Code Acceleration
  • SmartNIC: Evaluating SmartNIC performance in the Cloud
  • Urbana Project: A New Open-Source Educational FPGA board

Past Open Source Projects: