The AMD-Xilinx Heterogeneous Compute Cluster is hosted within the Coordinated Science Lab at UIUC. The cluster was designed to support high-performance computing (HPC), machine learning (ML), and genomics applications, and for investigating programming models, compilers, schedulers, systems and architectures. It scalable and expandable, and encompasses modern FPGAs, multi-GPU nodes, near-memory acceleration devices, and emerging compute devices.

The cluster is comprised of 6 compute nodes + 4 Support nodes.

• 1 x Head node – Many core, large memory development node.
• 2 x Compute nodes – Accelerated compute node
• 2 x Big compute nodes – Accelerated compute nodes with support for up to eight accelerators per node
• 1 x Big Data node – FPGA + high end GPU node for big data analytics research
• 4 x Login nodes

The nodes are interconnected on a 100 Gb/s ethernet rack switch with a 1 Gb/s uplink to communicate outside of the cluster. For storage, there is a shared 24TB home filesystem. Each compute node also includes high speed scratch space.

Overall compute infrastructure details: